Parallel array

Results: 341



#Item
231RETROSPECTIVE:  A Data Locality Optimizing Algorithm Monica S. Lam Computer Systems Laboratory Stanford University

RETROSPECTIVE: A Data Locality Optimizing Algorithm Monica S. Lam Computer Systems Laboratory Stanford University

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Source URL: suif.stanford.edu

Language: English - Date: 2003-01-05 22:10:50
232Parallel Flash Loader IP Core User Guide UG[removed] User Guide

Parallel Flash Loader IP Core User Guide UG[removed] User Guide

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Source URL: www.altera.com

Language: English - Date: 2014-06-24 18:22:18
233Lucas Krakow, Louis Rabiet, Yun Zou, Guillaume Iooss Sanjay Rajopadhye & Edwin Chong Colorado State University  n  UAV Resource Allocation

Lucas Krakow, Louis Rabiet, Yun Zou, Guillaume Iooss Sanjay Rajopadhye & Edwin Chong Colorado State University n  UAV Resource Allocation

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Source URL: www.dddas.org

Language: English - Date: 2014-06-10 18:31:48
234Microsoft Word - Parallel io performance and geodata v. 0.4.doc

Microsoft Word - Parallel io performance and geodata v. 0.4.doc

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Source URL: archives.gov

Language: English - Date: 2013-09-30 15:22:12
235A Fully Pipelined and Dynamically Composable Architecture of CGRA Jason Cong, Hui Huang, Chiyuan Ma, Bingjun Xiao and Peipei Zhou Computer Science Department University of California, Los Angeles Los Angeles, California,

A Fully Pipelined and Dynamically Composable Architecture of CGRA Jason Cong, Hui Huang, Chiyuan Ma, Bingjun Xiao and Peipei Zhou Computer Science Department University of California, Los Angeles Los Angeles, California,

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Source URL: vast.cs.ucla.edu

Language: English - Date: 2014-04-13 17:33:49
236Computer Science Technical Report An Approach for Code Generation in the Sparse Polyhedral Framework Michelle Mills Strout, Alan LaMielle,

Computer Science Technical Report An Approach for Code Generation in the Sparse Polyhedral Framework Michelle Mills Strout, Alan LaMielle,

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Source URL: www.cs.colostate.edu

Language: English - Date: 2013-12-24 12:07:31
237Optimizing Qsys System Performance

Optimizing Qsys System Performance

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Source URL: www.altera.com

Language: English
238A Case for FAME: FPGA Architecture Model Execution Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovi´c, David Patterson The Parallel Computing Laboratory CS Division, EECS Department, University of Cal

A Case for FAME: FPGA Architecture Model Execution Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovi´c, David Patterson The Parallel Computing Laboratory CS Division, EECS Department, University of Cal

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Source URL: www.eecs.berkeley.edu

Language: English - Date: 2010-09-20 13:56:51
239Massively Parallel Suffix Array Queries and On-Demand Phrase Extraction for Statistical Machine Translation Using GPUs Hua He Dept. of Computer Science University of Maryland College Park, Maryland

Massively Parallel Suffix Array Queries and On-Demand Phrase Extraction for Statistical Machine Translation Using GPUs Hua He Dept. of Computer Science University of Maryland College Park, Maryland

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Source URL: www.umiacs.umd.edu

Language: English - Date: 2013-05-30 13:33:38
240Backgrounder DSP Floating Point

Backgrounder DSP Floating Point

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Source URL: www.altera.com

Language: English - Date: 2014-04-22 03:02:05